Logic Analyzer on the PDS
As it turns out, the Macintosh SE has a Processor Direct Slot(PDS) which allowed developers to directly interface with external hardware. Since the Macintosh SE doesn't really have a kernel(just application calls that reside in the rom) or true virtual addressing, application developers would write drivers in assembly to query attached hardware directly. As on might imagine - such application could wreak much havok for the the end user.
I decided to take advantage of the processor direct slot by plugging in the Logic Analyzer at Digital Design Lab (DDL) directly into the PDS.
I first went to the DDL and wired up the Mac into the LA using this pinout. I then ran the LA software using the PDS clock as the acquisition edge.
Unfortunately, I didn't take a picture of data capture on the LA's screen. But the CPU cycled through approximately the same 200 addresses repeatedly with B2E3 constantly showing up on the data bus. I read through the Mac SE hardware documentation on startup procedures, and my best guess is that reset pin keeps getting pulled active. The reset vector resides at virtual address 0x0000 which is later translated by the BBU to different physical address
update this I stopped using the LA at DDL because of the difficulty and hassle. I built my own affordable LA described here.
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